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Disaggregating the Data Center: Designing Remote Gen5 NVMe Arrays with MCIO
The modern data center is facing a physical crisis. As AI accelerators like the NVIDIA Blackwell or H100/H200 series push Thermal Design Power (TDP) to 700W and beyond, the area immediately surrounding the CPU can quickly become a major hotspot." For AI architects, this creates a catch-22: You need Gen5 NVMe storage as close to the CPU as possible for performance, but the heat in that zone causes instant thermal throttling. The solution is Storage Disaggregation—moving M.2 NV
4 hours ago3 min read


Disaggregating the Data Center: Designing Remote Gen5 NVMe Arrays with MCIO
The modern data center is facing a physical crisis. As AI accelerators like the NVIDIA Blackwell or H100/H200 series push Thermal Design Power (TDP) to 700W and beyond, the area immediately surrounding the CPU can quickly become a major hotspot." For AI architects, this creates a catch-22: You need Gen5 NVMe storage as close to the CPU as possible for performance, but the heat in that zone causes instant thermal throttling. The solution is Storage Disaggregation—moving M.2 NV
May 263 min read


Building the "Swiss Army Knife" of Edge AI: Modular Compute with M.2 AIPUs
For years, Edge AI was forced into a corner: you either used underpowered integrated chips or massive, power-hungry GPUs that wouldn't fit in a ruggedized industrial-grade enclosure. Today, Edge architecture is shifting. The rise of M.2 AI Processing Units (AIPUs)—like the Hailo-10, Axelera Metis, and Ambrize—has introduced the era of Modular Compute. But these modules are only as good as the interface they plug into. To build a true "Swiss Army Knife" for your Edge environme
Mar 243 min read
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